> For the complete documentation index, see [llms.txt](https://smadi0x86-blog.gitbook.io/smadi0x86-playground/llms.txt). Markdown versions of documentation pages are available by appending `.md` to page URLs; this page is available as [Markdown](https://smadi0x86-blog.gitbook.io/smadi0x86-playground/architecture/operating-systems/os-and-architecture.md).

# OS & Architecture

## Modern Operating System Functionality

**Process and Thread Management**&#x20;

**Concurrency:** Doing many things simultaneously (I/0, processing, multiple programs, etc...)&#x20;

* Several users work at the same time as if each has a private machine.
* Threads (unit of OS control), one thread on the CPU at a time, but many threads active concurrently.

**I/O devices:** Let the CPU work while a slow I/O device is working.

**Memory management:** OS coordinates allocation of memory and moving data between disk and main memory.&#x20;

**Files:** OS coordinates how disk space is used for files, in order to find files and to store multiple files.

**Distributed systems & networks: A**llow a group of machines to work together on distributed hardware.

## Generic Computer Architecture

**CPU: T**he processor that performs the actual computation.

* Multiple “cores” common in today’s processors.

**I/O devices:** Terminal, disks, video board, printer, etc...&#x20;

* Network card is a key component, but also an I/O device.

&#x20;**Memory:** RAM containing data and programs used by the CPU.

**System bus: C**ommunication medium between CPU, memory, and peripherals.

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2F9anRU7ikEgegPAEOJseV%2Fimage.png?alt=media&amp;token=00621ff0-e8e8-46a7-869d-2ba4869ccc77" alt=""><figcaption></figcaption></figure>

## Protection

#### CPU supports a set of assembly instructions:

* MOV \[address], ax&#x20;
* ADD ax, bx
* MOV CRn (move control register)&#x20;
* IN, INS (input string)&#x20;
* HLT (halt)&#x20;
* LTR (load task register)&#x20;
* INT n (software interrupt)&#x20;

{% hint style="info" %}
Some instructions are sensitive or privileged.
{% endhint %}

### Kernel mode vs User mode

To protect the system from aberrant users and processors, some instructions are restricted to use only by the OS.&#x20;

#### Users may not:

* Address I/O directly&#x20;
* Use instructions that manipulate the state of memory (page table pointers, TLB load, etc...)&#x20;
* Set the mode bits that determine user or kernel mode&#x20;
* Disable and enable interrupts&#x20;
* Halt the machine

In kernel mode, the OS can do all these things.&#x20;

The hardware must support at least kernel and user mode.&#x20;

* A status bit in a protected processor register indicates the mode.&#x20;
* Protected instructions can only be executed in kernel mode.

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2F8nsifLydpvpuNDdCLimP%2Fimage.png?alt=media&amp;token=6f0c8c01-e187-44cc-924d-83e733b399fb" alt="" width="563"><figcaption></figcaption></figure>

**System call:** OS procedure that executes privileged instructions (e.g., I/O), also API exported by the kernel.

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2FRqVjPmYAC0GoewHOapmI%2Fimage.png?alt=media&amp;token=e55ad0fd-f648-474a-a69c-2dbb27de121c" alt=""><figcaption></figcaption></figure>

#### Examples of system calls:

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2FL0jK5M8tCHZqNGI3oz4a%2Fimage.png?alt=media&amp;token=e5da3c46-335b-48bb-9465-16bc3b602440" alt=""><figcaption></figcaption></figure>

## Memory Protection

#### Architecture must provide support so that the OS can:

* Protect user programs from each other.
* Protect the OS from user programs.&#x20;

The simplest technique is to use base and limit registers.&#x20;

* Base and limit registers are loaded by the OS before starting a program.&#x20;
* The CPU checks each user reference (instruction and data addresses), ensuring it falls between the base and limit register values.

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2F6uMUko7k1nrNCYKqvcl6%2Fimage.png?alt=media&amp;token=e606158f-c305-44fb-8da3-11ab12a8c37a" alt=""><figcaption></figcaption></figure>

### Process layout in memory

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2FaiflBqtyv75Fxm65MEj5%2Fimage.png?alt=media&amp;token=bdda8333-83eb-4986-baba-f89107f15db8" alt=""><figcaption></figcaption></figure>

#### Processes have three segments:&#x20;

* text
* data
* stack

### Registers

Register is a dedicated name for one word of memory managed by CPU.

**General-purpose on x86:**&#x20;

* EAX
* EBX
* ECX

**Special-purpose:**&#x20;

* “SP” = stack pointer&#x20;
* “FP” = Frame pointer&#x20;
* “PC” = Program counter&#x20;

{% hint style="info" %}
**Change processes:** Save current registers & load saved registers is called a context switch.
{% endhint %}

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2F8taSJp001peS43jlEJVj%2Fimage.png?alt=media&amp;token=8ecacb8c-4309-4f75-95fe-74a8a78652f2" alt=""><figcaption></figcaption></figure>

### Memory Hierarchy

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2FL2iJSEGjStNU1UwsUiTX%2Fimage.png?alt=media&amp;token=f700d645-33d5-4a19-a5c3-ae7117961568" alt=""><figcaption></figcaption></figure>

### Caches

#### Access to main memory is expensive:

* 100 cycles (slow, but relatively cheap)

#### Caches are small, fast, expensive memory:

* Hold recently-accessed data (D$) or instructions (I$)&#x20;
* Different sizes & locations&#x20;
  * **Level 1 (L1):** On-chip, smallish (tens of KB)&#x20;
  * **Level 2 (L2):** On or next to chip, larger (few MB)&#x20;
  * L**evel 3 (L3):** Pretty large, on bus (several MB)&#x20;
* Manages lines of memory (32-128 bytes)

{% hint style="info" %}
Caches are managed by hardware (no explicit OS management)
{% endhint %}

### Traps

**Traps:** special conditions detected by the architecture&#x20;

**Examples:**&#x20;

* Page fault
* Write to a read-only page
* Overflow
* Systems call

#### On detecting a trap, the hardware:

* Saves the state of the process (PC, stack, etc...)
* Transfers control to appropriate trap handler (OS routine)
  * The CPU indexes the memory-mapped trap vector with the trap number.
  * Then jumps to the address given in the vector.
  * Starts to execute at that address.
  * On completion, the OS resumes execution of the process.

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2F22iwnGmHtZqFgsXS1tsx%2Fimage.png?alt=media&amp;token=c969227a-765d-4856-8a45-add2d332f1e1" alt=""><figcaption></figcaption></figure>

**Modern OS use Virtual Memory traps for many functions:**&#x20;

* Debugging
* Distributed VM
* Garbage collection
* Copy-on-write, etc...&#x20;

Traps are a performance optimization. A less efficient solution is to insert extra instructions into the code everywhere a special condition could arise.

## I/O Control

* Each I/O device has a little processor inside it that enables it to run autonomously.
* CPU issues commands to I/O devices, and continues.
* When the I/O device completes the command, it issues an interrupt.
* CPU stops whatever it was doing and the OS processes the I/O device's interrupt.

### Three I/O Methods

1. Synchronous
2. Asynchronous
3. Memory-mapped

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2F468cthl64LypV4vaI4Xc%2Fimage.png?alt=media&amp;token=0feceeec-2753-4843-b060-2f4f2729d816" alt=""><figcaption></figcaption></figure>

## Virtual Memory

* Virtual memory allows users to run programs without loading the entire program in memory at once.
* Instead, pieces of the program are loaded as they are needed.&#x20;
* The OS must keep track of which pieces are in which parts of physical memory and which pieces are on disk.&#x20;
* In order for pieces of the program to be located and loaded without causing a major disruption to the program, the hardware provides a translation lookaside buffer to speed the lookup.

<figure><img src="https://4247064012-files.gitbook.io/~/files/v0/b/gitbook-x-prod.appspot.com/o/spaces%2FFLaJdzZGSq1DpczuSySw%2Fuploads%2FpLt1ZnPu4RzZktJ1Cc9o%2Fimage.png?alt=media&amp;token=600d5602-8c1c-4fbc-87d2-107971baf74f" alt=""><figcaption></figcaption></figure>
